Soldermask opening to prevent delamination

ABSTRACT

A multilayer circuit board includes a base layer, a conductive layer and a soldermask. The soldermask layer has two sets of openings. One of the openings are vent openings, that expose the base layer to provide ventilation so that gases may escape during processing. The second openings expose selective regions of a conductor layer. The multi-layer circuit board provides for less occurrences of delamination.

[0001] This application is a Divisional of U.S. application Ser. No.10/095,329, filed Mar. 11, 2002, which is a Continuation of U.S.application Ser. No. 09/417,491, filed Oct. 13, 1999, now U.S. Pat. No.6,356,452, both of which are incorporated herewith.

TECHNICAL FIELD OF THE INVENTION

[0002] The present invention relates generally to printed circuit boardsproduction and, in particular, to the processes utilized to createprinted circuit boards.

BACKGROUND OF THE INVENTION

[0003] A typical printed circuit board is a flat board that providessupport and electrical interconnection between microchips and otherelectronic components. The base of the board can be made of reinforcedfiberglass or plastic, and the electronic components are electricallyinterconnected by conductive pathways. There are several ways to makeprinted circuit boards. One method entails bonding a conductive foil,such as copper, over the base. A conductive pattern is then formed inthe conductor. One method of patterning the metal layer uses a negativeimage of the desired circuit pattern and a photo resist layer. The photoresist is activated using the image such that selected areas of thephoto resist can be removed. An etch process is then performed to removethe photo resist that was not activated and the underlying metal layer,leaving behind the conductive pathway pattern.

[0004] Today, most printed circuit boards are composed of several sheetsor layers. A multi-layer printed circuit board may be fabricated fromseveral composite sheets, each comprising a substrate of insulatingmaterial and a layer of metal, such as copper, attached to one surfaceof the substrate using a resin. A desired conductive pathway pattern isthen provided in the metal layer, as explained, and multiple layers ofinsulating material and metal conductor layers can be fabricated. Asoldermask layer can be provided over the top level of conductor tocontrol areas exposed to a soldering process. A finished printed circuitboard can then put through an assembly process where it is populatedwith various electrical components.

[0005] Delamination, or separation, problems have been discovered in theprinted circuit board assembly industry regarding processes similar tothe one described above. These problems are a result of the variousenvironmental stresses inherent to assembly procedures. For example,delamination of the soldermask layer can occur when moisture retained bya board's constituent components are exposed to post-production assemblyprocesses performed at high temperatures.

[0006] For the reasons stated above, and for other reasons stated belowwhich will become apparent to those skilled in the art upon reading andunderstanding the present specification, there is a need for amulti-layer printed circuit board assembly that reduces the likelihoodof delamination.

SUMMARY OF THE INVENTION

[0007] The above mentioned problems with circuit board assemblies andother problems are addressed by the present invention and which will beunderstood by reading and studying the following specification.

[0008] In one embodiment, a circuit board comprises a base layer, and aconductive layer located on a first side of the base layer. Theconductive layer is patterned into conductive traces. A soldermask layeris located on a surface of the conductive layer and a region of thefirst side of the base layer which is not covered by the conductivelayer. The soldermask layer is provided with a first plurality ofopenings to expose the base layer to provide ventilation, and whereinthe soldermask layer is further provided with a second plurality ofopenings to expose the conductive traces.

[0009] In another embodiment, a circuit board assembly comprises a baselayer, and a conductive layer located on top of the base layer. Theconductive layer is patterned to form conductive traces. A soldermask isattached over the conductor layer and the base layer. The soldermasklayer includes a first plurality of openings to expose a top surface ofthe base layer and a second plurality of openings to expose areas of theconductors. An integrated circuit is also attached to a first side ofthe circuit board.

BRIEF DESCRIPTION OF THE DRAWINGS

[0010]FIG. 1 is a top view of one embodiment of a simplified circuitboard according to the present invention;

[0011]FIG. 2 is a cross section view of the circuit board shown in FIG.1;

[0012]FIG. 3 is a top view of an embodiment of a detailed circuit boardaccording to the present invention; and

[0013]FIG. 4 is a cross section view of the circuit board shown in FIG.3.

DETAILED DESCRIPTION OF THE INVENTION

[0014] In the following detailed description of the invention, referenceis made to the accompanying drawings which form a part hereof, and inwhich is shown, by way of illustration, specific embodiments in whichthe invention may be practiced. In the drawings, like numerals describesubstantially similar components throughout the several views. Theseembodiments are described in sufficient detail to enable those skilledin the art to practice the invention. Other embodiments may be utilizedand structural, logical, and electrical changes may be made withoutdeparting from the scope of the present invention. The followingdetailed description is, therefore, not to be taken in a limiting sense,and the scope of the present invention is defined only by the appendedclaims, along with the full scope of equivalents to which such claimsare entitled.

[0015] Printed circuit boards, as described above, can be fabricatedusing multiple layers of different materials. These materials can beinsulators, conductors or other materials used to provide benefitsduring processing such as soldermasks. Because these materials differ incomposition, they behave differently to environmental conditions such astemperature and humidity. Of particular interest to the presentinvention is the retention of water, or other liquids, by insulatingmaterial used in fabrication of circuit boards.

[0016] Soldermasks, as known to those skilled in the art, are used tomask areas of a conductor to prevent solder from coating the conductor.That is, some areas of the conductor may be required to be coated insolder, while other areas need to be protected from solder. Bycontrolling the location of solder, conductive shorts can be prevented.

[0017] The soldermask layer can be screen printed over the conductor.The soldermask includes openings to expose selected areas of theconductor. It is desired that the soldermask remain adhered duringprocessing. If the soldermask layer delaminates from the conductor,conductive shorts or leakage paths can be formed.

[0018] The present invention provides a technique for reducingdelamination of a soldermask layer of a circuit board which results fromout-gassing of layers of the circuit board. FIG. 1 is a top view of asimplified circuit board 100 according to the present invention. Thecircuit board includes a conductor trace 110 and a soldermask used toshield the conductive layer from potential shorts by exposing onlyselected areas of the conductor via conductor openings 130. Thesoldermask also includes ventilation openings 140 to allow underlyinglayers of the circuit board to vent gases during processing withoutproducing adverse side effects to the adhesion of the soldermask. Thedetails of the vent openings, or holes, are described in greater detailbelow.

[0019]FIG. 2 illustrates a cross-section view of the circuit board ofFIG. 1. The soldermask 120, or solder resist, allows access to theconductor 110 via conductor openings 130. Unlike prior soldermasks, thepresent invention provides an opening, vent holes 140 to expose a baselayer 150. These openings allow for ventilation of the base layer. Thebase layer can be comprised of any electrically insulating material. Inone embodiment, the base material is Mitsubishi HCL832. The base layercan be fabricated using multiple layers, and is not limited to a singlematerial. The soldermask can be either a sheet of insulating materialwhich is adhered to the top of the base layer and conductor or aconformal coating. In one embodiment, the soldermask is a sheet of TaiyoAUS5 which is adhered to the board using a screen printing operation.Likewise, the conductor traces can be any suitable conductive, orsemi-conductive material such as copper.

[0020] As explained herein, the ventilation holes are provided in thesoldermask layer to allow the base layer to out-gas. As such, the ventholes are located in a region of the circuit board which do not containconductors. Because the soldermask in one embodiment is a sheet ofmaterial, the ventilation holes are patterned into a plurality of holes.That is, an array of holes is preferred to providing one large hole. Thelocation and number of the ventilation holes will be dependant upon thedesign of the circuit board. In general, maximizing the cumulativesurface area of ventilation holes in the locations not containingconductors is desired.

[0021]FIG. 3 provides a top view of another embodiment of a circuitboard 300 according to the present invention, and FIG. 4 provides across-sectional view of the circuit board of FIG. 3. The circuit boardincludes a conductive grid array 360 for providing an interconnect forcircuit components, such as but not limited to resistors, capacitors,inductors, and integrated circuits. The soldermask layer 320 includesfirst openings to provide access to the grid array conductors, andsecond opening 340 to expose the base layer. These openings aregenerally provided along outside edges of the circuits board.

[0022] An integrated circuit die assembly is fabricated using thecircuit board 300, as illustrated in FIG. 4. The die assembly iscomprised of the circuit board base layer 450 with a soldermask layer320 concealing a conductive layer 410. A rectangular shaped opening, oraperture 310 is provided in the board. The opening passes through thesoldermask layer, the conductive layer and the base layer. This openingprovided access to an integrated circuit die, as explained below. Aplurality of bond pads are located in regions 330 of the circuit boardoutside the aperture. A plurality of solder bump conductor openings 360are located on the same side of the circuit board as the bond pads.

[0023] The die assembly comprises the integrated circuit die (IC) 460which has its top side affixed to the bottom side of the circuit board.The IC can be affixed to the board with an adhesive 470. The adhesive isapplied to the IC's top side such bond connections provided on it's topside are exposed and fully accessible through aperture 310 when attachedto the base layer. The IC can then be wire bonded through the opening tothe bond pads provided in locations 330. The IC die and wire bonds arethen encapsulated with a non-conductive encapsulant 480 to provide anenvironmental seal.

[0024] Again, the soldermask layer included ventilation openings 340 toallow the underlying layers to expel gases without adversely affectingthe adherence of the soldermask layer. This is of particular interestwhen moisture retained by a board's constituent components (e.g. asoldermask layer or a base layer) are exposed to high temperaturesdelamination may occur in regions of the circuit board.

CONCLUSION

[0025] The invention allows gases trapped between layers of amulti-layered printed circuit board to escape, in an effort to preventdelamination. A circuit board has been described which includes openingsin a particular layer(s) of the multi-level printed circuit board. Thepresent invention describes an improved multi-layer circuit board thatis more resistant to delamination problems. An embodiment of amulti-layer circuit board according to the present invention comprises abase layer, a conductive layer and a soldermask. The soldermask layerhas two primary sets of openings. One of these sets are the ventopenings, or vent holes, that expose the base layer to provideventilation so that gases may escape. The circumference, location anddepth of the holes are dependent upon the nature of the application.This invention allows a plurality of layers, such as the soldermasklayer, to be used in printed circuit board applications, whilepreventing delamination throughout the board's surface. The reduction indelamination offers the added benefit of allowing for improved handlingof the circuit board, particularly during various processing stages.

[0026] Although specific embodiments have been illustrated and describedherein, it will be appreciated by those of ordinary skill in the artthat any arrangement which is calculated to achieve the same purpose maybe substituted for the specific embodiment shown. This application isintended to cover any adaptations or variations of the presentinvention. For example, by creating an avenue for gases to escape, thesoldermask will remain attached at the board's perimeter, leaving a flatsurface to clamp onto at the end of the assembly process. This makesfurther processing to the printed circuit board possible.

What is claimed is:
 1. An electrical device, comprising: an integratedcircuit supported by a base layer and having a plurality of integratedcircuit devices, wherein at least one of the plurality of integratedcircuit devices has a semiconductor structure formed by a methodcomprising: forming an insulator layer on a base layer, wherein theinsulator layer has a surface; patterning the insulator layer to definea hole, wherein the hole has sidewalls defined by the insulator layerand a bottom defined by an exposed portion of the base layer; forming atleast one titanium-containing layer overlying the surface of theinsulator layer and the sidewalls and the bottom of the hole by chemicalvapor deposition; forming a plug layer overlying the titanium-containinglayer and filling the hole; and removing a portion of the plug layeroverlying the surface of the insulator layer subsequent to removing theportion of the plug layer by exposing the portion of thetitanium-containing layer to a sulfuric acid solution.
 2. The device ofclaim 1, wherein the integrated circuit is adapted for use in asemiconductor die.
 3. The device of claim 2, wherein thetitanium-containing layer includes a titanium layer and a titaniumnitride layer overlying the titanium layer.
 4. The device of claim 3,wherein the plug layer includes tungsten.
 5. The device of claim 1,wherein the titanium-containing layer includes a titanium layer and atitanium nitride layer overlying the titanium layer.
 6. The device ofclaim 5, wherein the plug layer includes a tungsten layer.
 7. The deviceof claim 1, wherein the plug layer includes a tungsten layer.
 8. Thedevice of claim 1, wherein the integrated circuit includes a memorydevice having an array of memory cells.
 9. The device of claim 8,wherein the memory device further includes: a row access circuit coupledto the array of memory cells; a column access circuit coupled to thearray of memory cells; and an address decoder circuit coupled to the rowaccess circuit and the column access circuit.
 10. The device of claim 9,wherein the titanium-containing layer includes a titanium layer and atitanium nitride layer overlying the titanium layer.
 11. The device ofclaim 10, wherein the plug layer includes a tungsten layer.
 12. Thedevice of claim 1, wherein the integrated circuit includes a memorymodule that comprises: a support; a plurality of leads extending fromthe support; a command link coupled to at least one of the plurality ofleads; a plurality of data links, wherein each data link is coupled toat least one of the plurality of leads; and at least one memory devicecontained on the support and coupled to the command link, wherein the atleast one memory device includes an array of memory cells, wherein atleast one memory cell of the array of memory cells has a bit-linecontact.
 13. The device of claim 12, wherein the at least one memorydevice includes: a row access circuit coupled to the array of memorycells; a column access circuit coupled to the array of memory cells; andan address decoder circuit coupled to the row access circuit and thecolumn access circuit.
 14. The device of claim 12, wherein thetitanium-containing layer includes a titanium layer and a titaniumnitride layer overlying the titanium layer.
 15. The device of claim 14,wherein the plug layer includes a tungsten layer.
 16. The device ofclaim 1, wherein the integrated circuit includes a memory system,comprising: a controller; a command link coupled to the controller; adata link coupled to the controller; and a memory device coupled to thecommand link and the data link, wherein the memory device comprises anarray of memory cells, wherein at least one memory cell has a bit-linecontact
 17. The device of claim 16, wherein the at least one memorydevice includes: a row access circuit coupled to the array of memorycells; a column access circuit coupled to the array of memory cells; andan address decoder circuit coupled to the row access circuit and thecolumn access circuit.
 18. The device of claim 16, wherein thetitanium-containing layer includes a titanium layer and a titaniumnitride layer overlying the titanium layer.
 19. The device of claim 18,wherein the plug layer includes a tungsten layer.
 20. The device ofclaim 1, wherein the integrated circuit includes a semiconductor dieadapted to connect to an electronic system.
 21. The device of claim 20,wherein the titanium-containing layer includes a titanium layer and atitanium nitride layer overlying the titanium layer.
 22. The device ofclaim 21, wherein the plug layer includes a tungsten layer.
 23. Thedevice of claim 1, wherein the integrated circuit includes asemiconductor die adapted to connect to a circuit module that includes aplurality of leads connected to a processor.
 24. The device of claim 1,wherein the integrated circuit is supported by a base layer and having aplurality of integrated circuit devices.